1. Field of the Invention
This invention relates to x-ray imaging systems and to x-ray sensors for use in such systems.
2. Discussion of Related Art
Presently, large area imaging devices require highly parallel readout architectures in order to provide real-time frame rates and reduced image readout noise. However, parallel readout architectures commonly employ horizontal and vertical clocks and output shift registers that require non-imaging area on the imaging array surface.
For example, U.S. Pat. No. 4,322,752 to Bixby discloses methods and apparatus for readout of an area image sensor at greatly increased frame rates by the formatting of the sensor into blocks of photosite rows and by modifying the method of sensor readout in a manner compatible with such format.
U.S. Pat. No. 4,330,796 to Anagnostopoulos discloses a conventional area image sensor of the interline transfer type that is configured to be readable in blocks of adjacent photosite rows thereby enabling the modified sensor to be read out at fast frame rates.
For large-area x-ray imaging applications it would be highly desirable to produce imaging arrays that have no contiguous non-imaging areas. It would also be desirable to keep the cost to manufacture the arrays to a minimum. Assembling a large-area array from a single layer of bulk silicon is cost prohibitive, requiring the use of a mosaic or tiling procedure constructing the large-area array from smaller imager tiles or sensors.
U.S. Pat. No. 4,689,487 to Nishiki discloses a large-area x-ray detector array consisting of a photodiode array made of polycrystalline or amorphous semiconductor material.
U.S. Pat. No. 4,810,881 to Berger discloses a large-area amorphous silicon x-ray detector. Each pixel of the detector includes an amorphous silicon diode that is conductively connected in series to a capacitor which in turn are both then conductively connected to the drain of an amorphous silicon base junction field effect transistor.
European Patent Application No. 0,441,521,A1 to Tri Tran, discloses a large-area solid-state x-ray imaging device containing an array of amorphous silicon Schottky barrier diodes.
While amorphous silicon arrays offer contiguous sensing capability over large areas and are relatively inexpensive to fabricate, amorphous silicon suffers from low carrier mobility and lifetime due to the large number of unbound silicon atoms in the material. Amorphous silicon is usually hydrogenated to bind hydrogen to the silicon atoms increasing the carrier lifetime and mobility and improving the quality of the semiconductor as an imaging device. These silicon-hydrogen chemical bonds are easily broken by incident ionizing radiation such as x-rays. Consequently, hydrogenated amorphous silicon arrays must be protected from x-rays in order to maintain detector performance levels over an extended radiation exposure history.
It would be advantageous to construct large-area x-ray imaging arrays out of a semiconductor material that did not suffer from radiation exposure yet provide contiguous imaging area and was relatively inexpensive to fabricate.
Silicon on Insulator (SOI) technology has been studied and developed as an alternative to bulk silicon technology. SOI technology has many inherent advantages over bulk silicon. SOI substrates have an inherent speed advantage over comparable bulk silicon substrates due to the reduction in junction capacitance resulting from the insulating substrate. The isolation afforded by the insulating substrate has also proven to increase the resistance of circuits to the effects of ionizing radiation. This process is discussed in "High-Performance CMOS/SOS Circuits in SPEAR.TM. Material", by Donald C. Mayer, et al, IEEE Journal of Solid-state Circuits, Vol. 25, No. 1, pgs. 318-321, February, 1990.
The dominant SOI technology today is Silicon on Sapphire (SOS). In this process, a thin epitaxial film of silicon is deposited on a single-crystal .alpha.-aluminum oxide substrate by chemical vapor deposition (CVD). Despite its widespread use, SOS suffers from high defect density in the silicon film. These defects include microtwins, stacking faults and threading dislocations. New techniques such as double solid-phase epitaxy and recrystallization have made significant improvements in film quality and SOS films can now be produced with crystalline quality approaching that of bulk silicon. This process is discussed in, "Interfacial Structure in Heteroepitaxial Silicon on Sapphire", by Mark Aindow, Journal of the American Ceramic Society, 73(5), 1136-1143, 1990.
Recrystallization and regrowth techniques are also being applied to amorphous silicon films on an insulator substrate as well. The entire field of SOI technology is currently undergoing an explosive growth and high quality films of SOI substrates are being produced with a quality approaching that of bulk silicon with a manufacturing cost approaching that of amorphous silicon.
Wafer bonding of silicon wafers on sapphire substrates has also been studied as a method of producing SOS materials with combined qualities of bulk silicon and SOI substrates. This process is discussed, for example, in "Bonded silicon-on-sapphire wafers and devices", by George P Imthurn, et al, Journal of Applied Physics, 72(6), pgs. 2526-2527, September, 1992.